Design and Verification of a Charge Pump in Local Oscillator for 5G Applications

A charge pump (CP) that has low current mismatch to reduce the locking time of Phase-Locked Loop (PLL) is proposed. The design promising in 5G applications with capabilities fast settling and power consumption. In this design, a architecture consists an operational amplifier (OPA), switches, three D flip-flops (DFFs) passive devices. phase error compensation technique introduced time. mismatch, which mainly due leakage current, below 1% for large output voltage headroom 84% supply voltage. An 18.4% reduction realized by proposed design.